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Hardware Architecture

Authors and titles for recent submissions

[ total of 6 entries: 1-6 ]
[ showing up to 25 entries per page: fewer | more ]

Thu, 21 Sep 2017

[1]  arXiv:1709.06614 (cross-list from cs.ET) [pdf]
Title: A Memristive Neural Network Computing Engine using CMOS-Compatible Charge-Trap-Transistor (CTT)
Comments: 8 pages, 11 figures
Subjects: Emerging Technologies (cs.ET); Hardware Architecture (cs.AR); Learning (cs.LG)

Tue, 19 Sep 2017

[2]  arXiv:1709.05365 (cross-list from cs.DC) [pdf, ps, other]
Title: Understanding System Characteristics of Online Erasure Coding on Scalable, Distributed and Large-Scale SSD Array Systems
Comments: This paper is accepted by and will be published at 2017 IEEE International Symposium on Workload Characterization
Subjects: Distributed, Parallel, and Cluster Computing (cs.DC); Hardware Architecture (cs.AR)

Mon, 18 Sep 2017

[3]  arXiv:1709.05116 [pdf]
Title: A Streaming Accelerator for Deep Convolutional Neural Networks with Image and Feature Decomposition for Resource-limited System Applications
Comments: 5 pages, 8 figures
Subjects: Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)

Fri, 15 Sep 2017

[4]  arXiv:1709.04697 [pdf, ps, other]
Title: GREENER: A Tool for Improving Energy Efficiency of Register Files
Subjects: Hardware Architecture (cs.AR)
[5]  arXiv:1709.04806 (cross-list from cs.DC) [pdf, ps, other]
Title: TraceTracker: Hardware/Software Co-Evaluation for Large-Scale I/O Workload Reconstruction
Comments: This paper is accepted by and will be published at 2017 IEEE International Symposium on Workload Characterization
Subjects: Distributed, Parallel, and Cluster Computing (cs.DC); Hardware Architecture (cs.AR)

Thu, 14 Sep 2017

[6]  arXiv:1709.04184 (cross-list from cs.ET) [pdf]
Title: Charge-based computing with analogue reconfigurable gates
Comments: 22 pages, 15 figures
Subjects: Emerging Technologies (cs.ET); Hardware Architecture (cs.AR)
[ total of 6 entries: 1-6 ]
[ showing up to 25 entries per page: fewer | more ]

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